1. Technical Field
The present invention relates to a semiconductor integrated circuit, and more particularly, to a delay circuit which may be used in a semiconductor integrated circuit.
2. Related Art
A delay circuit delays an input signal by a predetermined time and outputs a delayed signal. In a semiconductor apparatus, a delay circuit is indispensably used in a sense amplifier to secure a data stabilization time and in a non-overlap clock signal generation circuit.
As a way of obtaining a delayed signal, RC delay is generally adopted. In RC delay mechanism, current flow is delayed based on the combination of impedance elements such as a resistor and a capacitor. A delay circuit of a semiconductor memory apparatus is made of a delay circuit in which a plurality of inverter terminals are coupled with one another. In an actual delay circuit, CMOS (complementary MOS) transistors, in which PMOS transistors and NMOS transistors are coupled in series, are used as the plurality of inverter terminals. The delay circuit includes capacitors and resistors in addition to the configuration of the CMOS transistors such that an input signal is delayed through RC delay and an output signal is generated.
FIG. 1 is a diagram illustrating a typical delay circuit. Referring to FIG. 1, a delay circuit is configured such that an input signal in is delayed, inverted and outputted through CMOS transistors including a resistor R and a capacitor C, and a resultant signal is delayed, inverted and outputted through CMOS transistors with a similar configuration, such that the input signal in is finally delayed and outputted as an output signal out. The delay circuit includes NMOS transistors and PMOS transistors which receive three control signals TCM0 through TCM2 and inverted signals TCM0B through TCM2B of the three control signals. By controlling current amounts of current paths to be delayed by these control signals, a delay time of the delay circuit may be controlled.
In the typical delay circuit of a semiconductor apparatus, since impedance elements such as resistors and capacitors occupy a relatively large area, the degree of integration of a semiconductor apparatus may be adversely influenced.
Also, as a semiconductor apparatus is gradually highly integrated, the characteristics of transistors tend to significantly change depending upon PVT (process, voltage and temperature) variations. In the case of the delay circuit shown in FIG. 1, because a delay time can be controlled depending on the current flow through the transistors, the delay time significantly changes depending on the PVT variations when compared to a delay circuit realized to occupy a larger area. If the delay time becomes unstable in this way, margins of signals, which are inputted/outputted in conformity with timings, are limited, and high speed operation of a semiconductor apparatus may be affected.